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-- Copyright (c) 1995-2008 Xilinx, Inc.  All rights reserved.
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--   ____  ____ 
--  /   /\/   / 
-- /___/  \  /    Vendor: Xilinx 
-- \   \   \/     Version : 10.1.03
--  \   \         Application : xaw2vhdl
--  /   /         Filename : SubAdder16.vhd
-- /___/   /\     Timestamp : 02/02/2012 23:01:22
-- \   \  /  \ 
--  \___\/\___\ 
--
--Command: xaw2vhdl-st .\SubAdder16.xaw .\SubAdder16
--Design Name: SubAdder16
--Device: xc5vlx110-1ff676
--
-- Module SubAdder16
-- Generated by Xilinx Architecture Wizard
-- Written for synthesis tool: XST

library ieee;
use ieee.std_logic_1164.ALL;
use ieee.numeric_std.ALL;
library UNISIM;
use UNISIM.Vcomponents.ALL;

entity SubAdder16 is
   port ( AB_IN            : in    std_logic_vector (15 downto 0); 
          ALUMODE_IN       : in    std_logic_vector (3 downto 0); 
          CARRYIN_IN       : in    std_logic; 
          CEMULTCARRYIN_IN : in    std_logic; 
          CEP_IN           : in    std_logic; 
          CLK_IN           : in    std_logic; 
          C_IN             : in    std_logic_vector (15 downto 0); 
          P_OUT            : out   std_logic_vector (15 downto 0));
end SubAdder16;

architecture BEHAVIORAL of SubAdder16 is
   signal GND_BUS_3        : std_logic_vector (2 downto 0);
   signal GND_BUS_18       : std_logic_vector (17 downto 0);
   signal GND_BUS_30       : std_logic_vector (29 downto 0);
   signal GND_BUS_48       : std_logic_vector (47 downto 0);
   signal GND_OPMODE       : std_logic;
   signal P_float          : std_logic_vector (31 downto 0);
   signal VCC_OPMODE       : std_logic;
begin
   GND_BUS_3(2 downto 0) <= "000";
   GND_BUS_18(17 downto 0) <= "000000000000000000";
   GND_BUS_30(29 downto 0) <= "000000000000000000000000000000";
   GND_BUS_48(47 downto 0) <= 
         "000000000000000000000000000000000000000000000000";
   GND_OPMODE <= '0';
   VCC_OPMODE <= '1';
   DSP48E_INST : DSP48E
   generic map( ACASCREG => 0,
            ALUMODEREG => 0,
            AREG => 0,
            AUTORESET_PATTERN_DETECT => FALSE,
            AUTORESET_PATTERN_DETECT_OPTINV => "MATCH",
            A_INPUT => "DIRECT",
            BCASCREG => 0,
            BREG => 0,
            B_INPUT => "DIRECT",
            CARRYINREG => 0,
            CARRYINSELREG => 0,
            CREG => 0,
            MASK => x"3FFFFFFFFFFF",
            MREG => 1,
            MULTCARRYINREG => 1,
            OPMODEREG => 0,
            PATTERN => x"000000000000",
            PREG => 1,
            SEL_MASK => "MASK",
            SEL_PATTERN => "PATTERN",
            SEL_ROUNDING_MASK => "SEL_MASK",
            USE_MULT => "NONE",
            USE_PATTERN_DETECT => "NO_PATDET",
            USE_SIMD => "ONE48")
      port map (A(29)=>AB_IN(15),
                A(28)=>AB_IN(15),
                A(27)=>AB_IN(15),
                A(26)=>AB_IN(15),
                A(25)=>AB_IN(15),
                A(24)=>AB_IN(15),
                A(23)=>AB_IN(15),
                A(22)=>AB_IN(15),
                A(21)=>AB_IN(15),
                A(20)=>AB_IN(15),
                A(19)=>AB_IN(15),
                A(18)=>AB_IN(15),
                A(17)=>AB_IN(15),
                A(16)=>AB_IN(15),
                A(15)=>AB_IN(15),
                A(14)=>AB_IN(15),
                A(13)=>AB_IN(15),
                A(12)=>AB_IN(15),
                A(11)=>AB_IN(15),
                A(10)=>AB_IN(15),
                A(9)=>AB_IN(15),
                A(8)=>AB_IN(15),
                A(7)=>AB_IN(15),
                A(6)=>AB_IN(15),
                A(5)=>AB_IN(15),
                A(4)=>AB_IN(15),
                A(3)=>AB_IN(15),
                A(2)=>AB_IN(15),
                A(1)=>AB_IN(15),
                A(0)=>AB_IN(15),
                ACIN(29 downto 0)=>GND_BUS_30(29 downto 0),
                ALUMODE(3 downto 0)=>ALUMODE_IN(3 downto 0),
                B(17)=>AB_IN(15),
                B(16)=>AB_IN(15),
                B(15 downto 0)=>AB_IN(15 downto 0),
                BCIN(17 downto 0)=>GND_BUS_18(17 downto 0),
                C(47)=>C_IN(15),
                C(46)=>C_IN(15),
                C(45)=>C_IN(15),
                C(44)=>C_IN(15),
                C(43)=>C_IN(15),
                C(42)=>C_IN(15),
                C(41)=>C_IN(15),
                C(40)=>C_IN(15),
                C(39)=>C_IN(15),
                C(38)=>C_IN(15),
                C(37)=>C_IN(15),
                C(36)=>C_IN(15),
                C(35)=>C_IN(15),
                C(34)=>C_IN(15),
                C(33)=>C_IN(15),
                C(32)=>C_IN(15),
                C(31)=>C_IN(15),
                C(30)=>C_IN(15),
                C(29)=>C_IN(15),
                C(28)=>C_IN(15),
                C(27)=>C_IN(15),
                C(26)=>C_IN(15),
                C(25)=>C_IN(15),
                C(24)=>C_IN(15),
                C(23)=>C_IN(15),
                C(22)=>C_IN(15),
                C(21)=>C_IN(15),
                C(20)=>C_IN(15),
                C(19)=>C_IN(15),
                C(18)=>C_IN(15),
                C(17)=>C_IN(15),
                C(16)=>C_IN(15),
                C(15 downto 0)=>C_IN(15 downto 0),
                CARRYCASCIN=>GND_OPMODE,
                CARRYIN=>CARRYIN_IN,
                CARRYINSEL(2 downto 0)=>GND_BUS_3(2 downto 0),
                CEALUMODE=>VCC_OPMODE,
                CEA1=>VCC_OPMODE,
                CEA2=>VCC_OPMODE,
                CEB1=>VCC_OPMODE,
                CEB2=>VCC_OPMODE,
                CEC=>VCC_OPMODE,
                CECARRYIN=>VCC_OPMODE,
                CECTRL=>VCC_OPMODE,
                CEM=>VCC_OPMODE,
                CEMULTCARRYIN=>CEMULTCARRYIN_IN,
                CEP=>CEP_IN,
                CLK=>CLK_IN,
                MULTSIGNIN=>GND_OPMODE,
                OPMODE(6)=>GND_OPMODE,
                OPMODE(5)=>VCC_OPMODE,
                OPMODE(4)=>VCC_OPMODE,
                OPMODE(3)=>GND_OPMODE,
                OPMODE(2)=>GND_OPMODE,
                OPMODE(1)=>VCC_OPMODE,
                OPMODE(0)=>VCC_OPMODE,
                PCIN(47 downto 0)=>GND_BUS_48(47 downto 0),
                RSTA=>GND_OPMODE,
                RSTALLCARRYIN=>GND_OPMODE,
                RSTALUMODE=>GND_OPMODE,
                RSTB=>GND_OPMODE,
                RSTC=>GND_OPMODE,
                RSTCTRL=>GND_OPMODE,
                RSTM=>GND_OPMODE,
                RSTP=>GND_OPMODE,
                ACOUT=>open,
                BCOUT=>open,
                CARRYCASCOUT=>open,
                CARRYOUT=>open,
                MULTSIGNOUT=>open,
                OVERFLOW=>open,
                P(47 downto 16)=>P_float(31 downto 0),
                P(15 downto 0)=>P_OUT(15 downto 0),
                PATTERNBDETECT=>open,
                PATTERNDETECT=>open,
                PCOUT=>open,
                UNDERFLOW=>open);
   
end BEHAVIORAL;


